Bridging technology-CAD and design-CAD for variability aware nano-CMOS circuits


Downloads per month over past year

Harish, B.P. and Bhat, N. and Patil, M. (2009) Bridging technology-CAD and design-CAD for variability aware nano-CMOS circuits. In: IEEE International Symposium on Circuits and Systems, ISCAS 2009, 24 May 2009 through 27 May 2009, Taipei; Taiwan.

[img] Text
Bridging Technology-CAD and Design-CAD for.pdf
Restricted to Registered users only

Download (761kB)
Official URL:


Transistor variability has emerged as one of the important constraints in Nano-CMOS circuit design. The ever decreasing device feature size with CMOS scaling, has resulted in an increasing uncertainty in predicting the exact device behaviour. The issue of variability needs to be addressed across the entire hierarchy of integrated circuits - optimization of process and device technology to yield minimal variability, robust circuit and system design architectures for variability aware design, and CAD tools to unify these two domains. The traditional variability modeling and CAD techniques address the problem in one of the two domains. We propose a unified framework to bridge the gap between technology CAD and design CAD. This framework enables one to directly relate the variation in circuit metrics such as speed, static power and dynamic power to the underlying semiconductor process parameters such as implant dose, annealing temperature etc. The proposed methodology is validated through rigorous simulations at the process, device and circuit level, incorporating various statistical techniques. A few examples will be presented to elaborate the significance of the proposed modeling methodology and its utility in the Nano CMOS design flow. In addition to being an important utility in the circuit design flow, the methodology will also help the foundries by providing a visibility on the impact of unit processes on the eventual circuit characteristics. This in turn can help in a systematic and optimized process monitoring in the foundries. ©2009 IEEE.

Item Type: Conference or Workshop Item (Paper)
Additional Information: cited By 0; Conference of 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 ; Conference Date: 24 May 2009 Through 27 May 2009; Conference Code:77530
Uncontrolled Keywords: Annealing temperatures; Bridging technology; CAD tool; Circuit designs; Circuit levels; CMOS scaling; Device technologies; Dynamic Power; Feature sizes; Modeling methodology; Nano CMOS; Optimized process; Rigorous simulation; Semiconductor process; Static power; Statistical techniques; System design; Technology CAD; Two domains; Unified framework; Unit process; Variability modeling; Variability-aware design, Computer aided design; Foundry practice; Integrated circuits; Process monitoring, Integrated circuit manufacture
Subjects: Faculty of Engineering > Electrical Engineering
Divisions: University Visvesvarayya College of Engineering > Department of Electrical Engineering
Depositing User: Mr. Kirana Kumar D
Date Deposited: 10 Mar 2016 10:32
Last Modified: 10 Mar 2016 10:32

Actions (login required)

View Item View Item